The disclosed invention relates generally to flip-flop circuits, and more particularly to a sample and hold flip-flop for CMOS logic.
The flip-flop is a basic one-bit storage element that is a fundamental building block in digital integrated circuits. Flip-flops are used extensively to control and synchronize data flow in all forms of digital logic. In a typical digital integrated circuit, flip-flops and their ancillary clocking structures may occupy approximately one-half of the chip area and utilize approximately one-third of the power consumed by the integrated circuit. The most efficient flip-flops in terms of small size, fast speed, and low power consumption are dynamic flip-flops which employ the storage of electric charge as a means of operation. The term "dynamic" refers to the characteristic that charge cannot be stored indefinitely due to unavoidable leakage paths, and dynamic flip-flops must be refreshed by continuous clocking.
Most dynamic flip-flop designs require two or more clock phases, which complicates clock distribution in a complex digital integrated circuit. Known dynamic flip-flop designs that employ a single clock phase suffer from charge distribution effects, which reduce noise margin, or mitigate this problem by means which make them larger or slower.
A general consideration for all flip-flop designs is the desire for faster operating speeds to allow for faster information processing in the digital integrated circuits in which they are used.